Synchronization to pseudo random number sequence with sign ambiguity in communications systems

ABSTRACT

A method is disclosed for synchronizing, in the presence of sign ambiguity, to a pseudo random maximal length sequence having a characteristic polynomial of order k with a coefficients vector A given by: 
     
         A= 1 a.sub.1 a.sub.2 . . . a.sub.k-1 1! 
    
     where each of the coefficients a 1  to a k-1  is 1 for an intermediate tap location and otherwise is 0. A received symbol sequence is supplied to and shifted through a K=k+1 stage shift register with P intermediate taps in positions determined by a coefficients vector A in  given by: 
     
         A.sub.in = 1 a.sub.1 (a.sub.1 ⊕a.sub.2) (a.sub.2 ⊕a.sub.3) . . . 
    
      (a k-2  ⊕a k-1 ) a k-1  1! 
     where a 1  and a k-1  are the inverse of a 1  and a k-1  respectively and ⊕ denotes a modulo-2 sum, whereby the shift register has P intermediate taps where P is a positive integer less than K. A respective correlation signal is recursively added at an input for the received symbol sequence and at each intermediate tap. Each correlation signal is produced by correlating the P+1 signals from said input, intermediate taps, and output other than the signal to which the respective correlation signal is added. The invention is particularly applicable to pilot synchronization in CDMA terminals.

This application claims the benefit of United States ProvisionalApplication No. 60/001,881 filed Aug. 3, 1995, the entire contents anddisclosure of which are hereby incorporated herein by reference.

CROSS-REFERENCE TO RELATED APPLICATION

Reference is directed to U.S. application Ser. No. 08/688,670 filed Jul.29, 1996 in the names of Philip H. Thomas et al. and entitled "PseudoRandom Number Sequence Synchronization In Communications Systems"(claiming the benefit of United States Provisional Application No.60/001,885 filed Aug. 3, 1995), the entire contents and disclosure ofwhich are hereby incorporated herein by reference. For brevity andconvenience, this is referred to below as Reference A.

BACKGROUND OF THE INVENTION

This invention relates to synchronization in communications systems, forexample spread spectrum cellular systems or other wireless digitalcommunications systems, and is particularly concerned withsynchronization in such systems using long pseudo random numbersequences.

In spread spectrum communications systems, fast synchronization to along pseudo random or pseudo noise sequence, referred to for brevity asa PN sequence, is of importance. It is known to handle PN sequencesynchronization by using auto-correlation charactenistics of the PNsequence. One type of PN sequence widely used in practice is a maximallength sequence, referred to as an m-sequence, which is generated by alinear feedback shift register. If the shift register has k stages, thenthe length of the m-sequence is 2^(k) -1 symbols.

Long PN sequences are often employed in spread spectrum communicationssystems, but increase the time required to establish synchronization. Toreduce this time it is known to use recurrent searching synchronizationmethods, with the advantage that synchronization can be achieved basedon only a small part of a very long sequence when the SNR(signal-to-noise ratio) is not low. However, these methods have not beeneffective when the SNR is low, for example less than 0 dB, because onlya small part of the sequence is used for synchronization. Low SNR iscommon in spread spectrum communications systems.

Reference A provides an improved method of synchronizing to a PNsequence, which can facilitate fast synchronization to a long PNsequence even at low SNR and when the PN sequence is not an m-sequence.However, the method may not work properly when the received symbolsequence has sign ambiguity, e.g. contains sign inversions. A signinversion can arise from canter phase ambiguity, in which case it isconstant throughout the entire received symbol sequence. Sign inversionscan also occur in a relatively random manner due to modulation of thesequence by data symbols in normal operating states of thecommunications system.

An object of this invention is to provide an improved method forachieving synchronization to a PN sequence in the presence of signambiguity.

SUMMARY OF THE INVENTION

The invention provides a method of synchronizing to a PN (pseudo random)sequence which can be generated by a linear feedback shift registerhaving k stages and p intermediate taps, where k and p are positiveintegers and k>p, the sequence being a maximal-length sequencecomprising 2^(k) -1 symbols and having a characteristic polynomial oforder k with a coefficients vector A given by:

    A= 1 a.sub.1 a.sub.2 . . . a.sub.k-1 1!

where the coefficients a₁ to a_(k-1) are each 1 for an intermediate taplocation and otherwise are 0, comprising the steps of: supplying areceived symbol sequence having sign ambiguity to an input of, andshifting the sequence through, a shift register having K=k+1 stages withan intermediate tap at each location defined by a 1, between first andlast 1s, in a coefficients vector A_(in) given by:

    A.sub.in = 1 a.sub.1 (a.sub.1 ⊕a.sub.2) (a.sub.2 ⊕a.sub.3) . . . (a.sub.k-2 ⊕a.sub.k-1) a.sub.k-1 1!

where a₁ and a_(k-1) are the inverse of a₁ and a_(k-1) respectively and⊕ denotes a modulo-2 sum, whereby the shift register has P intermediatetaps where P is a positive integer less than K; recursively adding arespective correlation signal at the input and at each intermediate tapof the shift register; and producing each correlation signal bycorrelating the P+1 signals from said input, intermediate taps, andoutput of the shift register other than the signal to which therespective correlation signal is added.

Viewed alternatively, the method comprises shifting the received symbolsequence having sign ambiguity through a shift register having K=k+1stages with an intermediate tap at each location defined by a 1, betweenfirst and last 1s, in a coefficients vector A_(in) given by:

    A.sub.in = 1 a.sub.1 (a.sub.1 ⊕a.sub.2) (a.sub.2 ⊕a.sub.3) . . . (a.sub.k-2 ⊕a.sub.k-1) a.sub.k-1 1!

where a₁ and a_(k-1) are the inverse of a₁ and a_(k-1) respectively and⊕ denotes a modulo-2 sum, whereby the shift register has P intermediatetaps where P is a positive integer less than K; at the input and at eachintermediate tap of the shift register, recursively adding to the shiftregister contents a respective correlation signal; producing thecorrelation signal for adding at the input of the shift register bycorrelating the P+1 signals from the P intermediate taps and the outputof the shift register; and producing the correlation signal for addingat each of the P intermediate taps by correlating the P+1 signals fromthe input, output, and P-1 other intermediate taps of the shiftregister.

Conveniently the step of producing each correlation signal comprisesproducing a product of the signs of said P+1 signals and of a minimumabsolute value of said P+1 signals. The step of supplying the receivedsymbol sequence to the input of the shift register can comprise the stepof modifying the received symbol sequence in accordance with anon-linear function.

The method of this invention thus effectively applies the method ofReference A to a non-maximum length PN sequence of order K=k+1 toachieve synchronization to a PN m-sequence of order k with signambiguity (i.e. sign inversion(s)). The invention largely retains theadvantages of the method of Reference A, in that it can provide reliablesynchronization even for negative SNR and after processing only a smallpart of the full PN sequence.

The invention is particularly useful in communications systems which mayrequire fast synchronization to a PN m-sequence in relatively low SNRconditions, such as direct sequence spread spectrum communicationssystems, for example for synchronization to the pilot PN sequence in thepilot channel in an IS-95 CDMA terminal.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be further understood from the following descriptionwith reference to the accompanying drawings, in which:

FIG. 1 schematically illustrates a block diagram of part of a wirelessdigital communications receiver;

FIG. 2 schematically illustrates a linear feedback shift register forgenerating a PN sequence;

FIG. 3 schematically illustrates a synchronization arrangement forimplementing an embodiment of the method of the invention;

FIG. 4 schematically illustrates in greater detail a correlation blockof the synchronization arrangement of FIG. 3; and

FIG. 5 illustrates performance of the arrangement indicated bysimulation results.

DETAILED DESCRIPTION

The following description presents an algorithm for general channelconditions, followed by simplified algorithms which facilitate practicalimplementation. An arrangement for implementing an embodiment of themethod is then described in detail.

GENERAL CHANNEL CONDITIONS

For extracting symbols b_(i) =±1, counted by an integer i and having asymbol duration T₀, of a PN sequence of length M symbols from a receivedinput signal Y_(n) accompanied by noise represented by a random valuesequence y_(n), where n is an integer identifying each sampling point, aprocessing state is given by equation (1): ##EQU1## where the receivedsignal is assumed for convenience to have unit amplitude, ν representsthe sign of the received symbol sequence and has the value ±1,.increment.t is the sampling interval, τ_(n) is a PN sequence delay forthe sampling point n and is assumed to be constant for all samplingpoints, f() is a function representing the pulse form which has non-zerovalues only in the interval (0,1), and Ψ(,) is a function whichrepresents the interaction between the signal and noise.

Assuming that the sampling interval .increment.t=T₀ and that noisesamples are not correlated for this sampling interval, then equation (1)can be expressed as: ##EQU2## where q is a discrete random variableuniformly distributed in the interval 0,M-1!. Assuming that the symboltiming (i.e. clock) recovery is perfect, the pulse form function fn-i+1-q! is a delta function which has a value of 1 for n-i+1-q=0 andotherwise has a value of 0. Using the notation: ##EQU3## gives theresults:

    B.sub.n =b.sub.n-q+1                                       (4)

    Y.sub.n =Ψ(νB.sub.n,y.sub.n)                        (5)

A linear feedback shift register, having k stages and p taps at stagesL₁, L₂, . . . L_(p), can be used as illustrated in FIG. 2 and describedbelow to generate a sequence in accordance with a polynomial G(D) oforder k given by: ##EQU4## where i, p, and k are integers. The n-thsymbol of such a sequence is determined by a subsequence comprising thek symbols preceding the n-th symbol, so that:

    B.sub.n =B.sub.n-k B.sub.n-L.sbsb.1 B.sub.n-L.sbsb.2 . . . B.sub.n-L.sbsb.p (7)

If the polynomial represented by equation (6) is primitive, then thegenerated sequence is an m-sequence (maximal length sequence) with alength or period of M=2^(k) -1 symbols.

Incorporating a new discrete variable C_(n) =νB_(n) into equation (7)gives:

    C.sub.n-k C.sub.n-L.sbsb.1 C.sub.n-L.sbsb.2 . . . C.sub.n-L.sbsb.p =ν.sup.p+1 B.sub.n-k B.sub.n-L.sbsb.1 B.sub.n-L.sbsb.2 . . . B.sub.n-L.sbsb.p                                          (8)

For an m-sequence the number of intermediate tap outputs p+1 is even, sothat ν^(p+1) =1 for any m-sequence. Consequently, a common generatingequation for both direct and inverse sequences can be expressed in theform:

    C.sub.n =νC.sub.n-k C.sub.n-L.sbsb.1 C.sub.n-L.sbsb.2 . . . C.sub.n-L.sbsb.p                                          (9)

and the preceding (n-1)-th step can be expressed as:

    C.sub.n-1 =νC.sub.n-k-1 C.sub.n-L.sbsb.1.sub.-1 C.sub.n-L.sbsb.2.sub.-1 . . . C.sub.n-L.sbsb.p.sub.-1                             (10)

from which:

    ν=C.sub.n-1 C.sub.n-k-1 C.sub.n-L.sbsb.1.sub.-1 C.sub.n-L.sbsb.2.sub.-1 . . .C.sub.n-L.sbsb.p.sub.-1                              (11)

Substituting for ν from equation (11) into equation (9) gives therecursive equation for symbols in both direct and inverse sequences:

    C=C.sub.n-k C.sub.n-L.sbsb.1 C.sub.n-L.sbsb.2 . . . C.sub.n-L.sbsb.p C.sub.n-1 C.sub.n-k-1 C.sub.n-L.sbsb.1.sub.-1 C.sub.n-L.sbsb.2.sub.-1 . . . C.sub.n-L.sbsb.p.sub.-1

from which:

    C=C.sub.n-K C.sub.n-R.sbsb.1 C.sub.n-R.sbsb.2 . . . C.sub.n-R.sbsb.P (12)

where K=k+1 is the number of stages in the generating shift register forboth direct and inverse sequences, the shift register having Pintermediate taps at stages R₁, R₂, . . . R_(P).

The number P and the intermediate tap locations R₁, R₂, . . . R_(P) ofthe generating shift register for direct and inverse sequences can beeasily determined. If the initial sequence is assumed to be generated bya characteristic polynomial of order k with a coefficients vector Agiven by:

    A= 1 a.sub.1 a.sub.2 . . . a.sub.k-1 1!                    (13)

where the coefficients a_(i) (i being an integer from 1 to k-1) are each1 for the intermediate tap locations L₁, L₂, . . . L_(p) and otherwiseare 0, then a coefficients vector A_(in) of order K=k+1 for thecharacteristic polynomial for both direct and inverse sequences can bedetermined by a vector modulo-2 sum of two coefficients vectors A1 andA2 given by:

    A1= 0  1 a.sub.1 a.sub.2 . . . a.sub.k-1 1!!

    A2=  1 a.sub.1 a.sub.2 . . . a.sub.k-1 1! 0!               (14)

so that:

    A.sub.in = 1 a.sub.1 (a.sub.1 ⊕a.sub.2) (a.sub.2 ⊕a.sub.3) . . . (a.sub.k-2 ⊕a.sub.k-1) a.sub.k-1 1!                   (15)

where a_(i) denotes the inverse of a_(i) and ⊕ denotes the modulo-2 sum.

A channel model is then given by equation (12) above and the equation:

    Y.sub.n =Ψ(C.sub.n,y.sub.n)                            (16)

It can be seen that this model, for the (non maximal-length) linearrecursive sequence of equation (15), has the same form as the modeldefined by equations (5) and (7) of Reference A. Following the reasoninggiven in Reference A, a recursive algorithm for filtering a discrete PNsequence of symbols having sign ambiguity or inversions is expressed bythe following equation derived from equation (13) of Reference A:##EQU5## where C_(n-)τ^(n) denotes the n-th iteration of a recursivenon-linear minimum mean-square estimate of the symbol C_(n-)τ, with theinitial condition C₁₋τ⁰ with τ being an integer from 1 to K.Conveniently the initial condition is set to C₁₋τ⁰ =0 for all values ofτ.

It can also be shown that, analogously to equation (11) in Reference A,a maximum probability extrapolation estimate C_(n) for the n-th symbolC_(n) is given by: ##EQU6##

Analogously to Reference A, equation (17) can be simplified usinghyperbolic functions and the following notations:

    γ.sub.n =a tanh φ(Y.sub.n)

    U.sub.n-i.sup.n-1 =a tanh C.sub.n-i.sup.n-1

    U.sub.n-i.sup.n =a tanh C.sub.n-i.sup.n

    i=1, 2, . . . K                                            (19)

with the approximation:

    a tanh (tanh x tanh y)≈sgn x sgn y min{|x|,|y|}          (20)

to give the following equation (21): ##EQU7## with the initial conditionU₁₋τ⁰ with τ being an integer from 1 to K.

For a channel with only additive white Gaussian noise (AWGN),represented by: ##EQU8## equation (21) can be simplified to the form ofthe following equation (23): ##EQU9## with the initial condition ν₋τ⁰with τ being an integer from 1 to K, where:

    ν.sub.n-K.sup.n-1 =σ.sub.y.sup.2 U.sub.n-K.sup.n-1

    ν.sub.n-τ.sup.n =σ.sub.y.sup.2 U.sub.n-τ.sup.n (24)

and σ_(y) ² can be unknown.

Physical Implementation

Referring now to the drawings, FIG. 1 illustrates in a block diagramparts of a wireless digital communications receiver, for example for aspread spectrum cellular communications system compatible with the IS-95standard, in which a wireless digital communications signal is suppliedvia an RF (radio frequency) circuit 20 of a receiver to a down converter22 to produce a signal which is sampled by a sampler 24, the samplesbeing converted into digital form by an A-D (analog-to-digital)converter 26 for processing in digital circuits 28 convenientlyimplemented in a DSP integrated circuit. The digital circuits 28 includea carrier recovery block 30, a timing or clock recovery block 32, and aPN sequence synchronization block 34 in which processing of the digitalsignals is performed. The PN sequence synchronization block 34 issupplied with the sampled and digitized received symbol sequence fromthe output of the A-D converter 26, and this constitutes the inputsignal Y_(n) of equation (1) above and is the input to thesynchronization arrangement described below with reference to FIG. 3.

FIG. 2 illustrates a linear feedback shift register arrangement whichcan be used to produce a PN sequence for synchronization. Thearrangement comprises a shift register 36 having k stages numbered 1 tok, with the outputs of the k-th stage and of intermediate taps along theshift register at the outputs of stages L₁, L₂, and L_(p) supplied toinputs of a modulo-2 adder 38. An output of the adder 38 is fed back tothe input of the first stage of the shift register and also constitutesa PN sequence output signal in accordance with equation (7) above.

By way of example, it is assumed that the PN sequence to whichsynchronization is to be established is an m-sequence with order k=10and the generation polynomial: ##EQU10##

The period or length of the sequence is 2^(k) -1=1023 symbols, and thenumber of intermediate taps of a linear feedback shift register whichcan be used to generate the sequence is p=7. The coefficients vector forthe generating polynomial for this sequence can be seen from equations(13) and (25) to be:

    A= 1 0 0 1 1 1 1 1 1 1 1!                                  (26)

From equation (14), the coefficients vectors A1 and A2 and theirelement-by-element modulo-2 sum constituting the coefficients vectorA_(in) of the characteristic polynomial of order K=k+1=11 are:

    A1= 0 1 0 0 1 1 1 1 1 1 1 1!

    A2= 1 0 0 1 1 1 1 1 1 1 1 0!

    Ain= 1 1 0 1 0 0 0 0 0 0 0 1!                              (27)

from which it can be seen that P=2 and the generating polynomial forboth direct and inverse sequences is:

    A.sub.in =1+D+D.sup.3 +D.sup.11                            (28)

FIG. 3 illustrates a consequent synchronization arrangement, whichincludes three correlators and adders as described below for the case ofP=2 and serves to implement equation (21). FIG. 4 illustrates the formof each of the correlators.

Referring to FIG. 3, the synchronization arrangement comprises threeshift register parts 90 to 92 which, in accordance with the coefficientsvector A_(in) of equations (27) and (28), provide outputs atintermediate taps after 1 and 3 stages, and an output after K=11 stages,of the shift register. Inputs of the shift register parts 90 to 92 aresupplied with the outputs of adders 94 to 96 respectively. A calculator93 produces the output signal γ_(n) from the input signal Y_(n)constituted by the received symbol sequence in accordance with the firstline of equation (19). Each of the three correlators 97 to 99 is asdescribed below with reference to FIG. 4 and produces a respectivecorrelation signal by correlating the three signals from said input,intermediate taps, and output other than the signal to which therespective correlation signal is added by the respective one of theadders 94 to 96.

Thus the correlator 97, producing a correlation signal to be added inthe adder 94 to the signal γ_(n) derived by the calculator 93 from theinput signal Y_(n), correlates the signals from the output and the twointermediate taps of the shift register. The correlator 98, producing acorrelation signal to be added in the adder 95 to the output signal fromthe first stage of the shift register (part 90), correlates the signalγ_(n) derived from the input signal Y_(n) and the signals from theoutput and the third stage (part 91) of the shift register. Similarlythe correlator 99, producing a correlation signal to be added in theadder 96 to the output signal from the third stage of the shift register(part 91), correlates the signal γ_(n) derived from the input signalY_(n) and the signals from the output and the first stage (part 90) ofthe shift register.

As illustrated in FIG. 4, each of the correlators 97 to 99 comprisesthree sign functions (SGN) 74 to 76, which are supplied with the threeinput signals to the correlator and produce at their outputs signsignals representing the signs of these inputs, three absolute valuefunctions (ABS) 78 to 80, which are supplied with the three inputsignals to the correlator and produce at their outputs signalsrepresenting the absolute values of these inputs, a minimum function(MIN) 82, which produces at its output the minimum value of the absolutevalues supplied to its inputs from the functions 78 to 80, and twomultipliers 84 and 86. The multiplier 84 produces at its output aproduct of the sign signals supplied to its inputs from the functions 74to 76, and the multiplier 86 multiplies this output by the minimum valueproduced by the function 82 to produce the output signal of thecorrelator. As can be appreciated, all of these functions can be easilyimplemented within a DSP integrated circuit, without requiring divisionor multiple digit multiplication operations.

It is also observed that, although for the correlators are describedseparately, the sign functions 74 to 76 and the absolute value functions78 to 80 can be used commonly among the correlators; i.e. the threecorrelators 97 to 99 only require a total of four such sign functionsand four such absolute value functions for producing the signs andabsolute values of the four signals to be correlated.

It can easily be seen that the synchronization arrangement of FIGS. 3and 4 operates in accordance with equation (21) above. Initially theshift register contents are zeroed, and the synchronized PN sequence canbe obtained from the contents of the shift register parts 90 to 92 whensynchronization has been achieved. It can also be seen that thisarrangement operates in accordance with the simplified equation (23) fora channel with AWGN simply by replacing the non-linear calculationfunction 93 by a constant.

FIG. 3 also shows the synchronization arrangement as including anoptional further sign function (SGN) 88, which is supplied with anadditional output from the correlator 97, this output being taken fromthe output of the multiplier 84 in the correlator 97 as shown by abroken line in FIG. 4. The output of the function 88 constitutes thesymbol estimate C_(n) in accordance with equation (18), and thus this iseasily provided as a byproduct of the synchronization process.

FIG. 5 illustrates approximately performance of the synchronizationmethod and arrangement described in the above example as expected fromsimulation results, showing the probability of synchronization plottedagainst number of symbols of the sequence received, for SNRs of 0 and -3dB. In the former case, synchronization is achieved within 200 symbols.In the latter case, the probability of synchronization being achievedwithin 200 symbols is reduced to about 0.7. As can be appreciated fromthese results, even with these low SNRs and phase ambiguity,synchronization is achieved within only part of the PN sequence, and thespeed of synchronization improves rapidly with increasing SNR.

The synchronization arrangement described above is thereforeparticularly advantageous in cases where the SNR is low, for exampleabout 0 dB or less. For very low SNR, the arrangement can be used forone stage of a multiple stage system. It is further noted that thearrangement has the advantage that its complexity is largely independentof the PN sequence length, being proportionally dependent upon thelength of the PN sequence generating register.

Although particular embodiments of the invention have been described indetail, it should be appreciated that numerous modifications,variations, and adaptations may be made without departing from the scopeof the invention as defined in the claims.

What is claimed is:
 1. A method of synchronizing to a PN (pseudo random)sequence which can be generated by a linear feedback shift registerhaving k stages and p intermediate taps, where k and p are positiveintegers and k>p, the PN sequence being a maximal-length sequencecomprising 2^(k-) 1 symbols and having a characteristic polynomial oforder k with a coefficients vector A given by:

    A= 1 a.sub.1 a.sub.2 . . . a.sub.k-1 1!

where the coefficients a₁ to a_(k-1) are each 1 for an intermediate taplocation and otherwise are 0, the method comprising the steps of:supplying a received symbol sequence having sign ambiguity to an inputof, and shifting the sequence through, a shift register having K=k+1stages with an intermediate tap at each location defined by a 1, betweenfirst and last 1s, in a coefficients vector A_(in) given by:

    A.sub.in = 1 a.sub.1 (a.sub.1 ⊕a.sub.2) (a.sub.2 ⊕a.sub.3) . . . (a.sub.k-2 ⊕a.sub.k-1) a.sub.k-1 1!

where a₁ and a_(k-1) are the inverse of a₁ and a_(k-1) respectively and⊕ denotes a modulo-2 sum, whereby the shift register has P intermediatetaps where P is a positive integer less than K; recursively adding arespective correlation signal at the input and at each intermediate tapof the shift register; and producing each correlation signal bycorrelating P+1 signals from said input, intermediate taps, and outputof the shift register other than the signal to which the respectivecorrelation signal is added.
 2. A method as claimed in claim 1 whereinthe step of producing each correlation signal comprises producing aproduct of the signs of said P+1 signals and of a minimum absolute valueof said P+1 signals.
 3. A method as claimed in claim 2 wherein the stepof supplying the received symbol sequence to the input of the shiftregister comprises the step of modifying the received symbol sequence inaccordance with a non-linear function.
 4. A method as claimed in claim 1wherein the step of supplying the received symbol sequence to the inputof the shift register comprises the step of modifying the receivedsymbol sequence in accordance with a non-linear function.
 5. A method asclaimed in claim 1 wherein P=2.
 6. A method as claimed in claim 2wherein P=2.
 7. A method as claimed in claim 3 wherein P=2.
 8. A methodof synchronizing a received symbol sequence having sign ambiguity to aPN (pseudo random) sequence which can be generated by a linear feedbackshift register having k stages and p intermediate taps, where k and pare positive integers and k>p, the PN sequence being a maximal-lengthsequence comprising 2^(k-1) symbols and having a characteristicpolynomial of order k with a coefficients vector A given by:

    A= 1 a.sub.1 a.sub.2 . . . a.sub.k-1 1 !

where the coefficients a₁ to a_(k-1) are each 1 for an intermediate taplocation and otherwise are 0, the method comprising the steps of:shifting the received symbol sequence through a shift register havingK=k+1 stages with an intermediate tap at each location defined by a 1,between first and last 1s, in a coefficients vector A_(in) given by:

    A.sub.in = 1 a.sub.1 (a.sub.1 ⊕a.sub.2) (a.sub.2 ⊕a.sub.3) . . . (a.sub.k-2 ⊕a.sub.k-1) a.sub.k-1 1!

where a₁ and a_(k-1) are the inverse of a₁ and a_(k-1) respectively and⊕ denotes a modulo-2 sum, whereby the shift register has P intermediatetaps where P is a positive integer less than K; at the input and at eachintermediate tap of the shift register, recursively adding to the shiftregister contents a respective correlation signal; producing thecorrelation signal for adding at the input of the shift register bycorrelating P+1 signals from the P intermediate taps and the output ofthe shift register; and producing the correlation signal for adding ateach of the P intermediate taps by correlating P+1 signals from theinput, output, and P-1 other intermediate taps of the shift register. 9.A method as claimed in claim 8 wherein the step of producing eachcorrelation signal comprises producing a product of the signs and of aminimum absolute value of the P+1 signals being correlated.
 10. A methodas claimed in claim 9 and including the step of supplying the receivedsymbol sequence to the input of the shift register via a non-linearfunction.
 11. A method as claimed in claim 8 and including the step ofsupplying the received symbol sequence to the input of the shiftregister via a non-linear function.
 12. A method as claimed in claim 8wherein P=2.
 13. A method as claimed in claim 9 wherein P=2.
 14. Amethod as claimed in claim 10 wherein P=2.